| Publication CODE |
Title |
| ISO/IEC 18372:2004 (2004-12) |
INFORMATION TECHNOLOGY - RAPIDIO TM INTERCONNECT SPECIFICATION |
| |
| Price Excl. VAT |
Total number of pages, tables and drawings |
|
229.00 €
|
399. |
Description
The RapidIO architecture was developed to address the need for a high-performance low pin count packet-switched system level
interconnect to be used in a variety of applications as an open standard. The architecture is targeted toward networking, telecom, and high performance embedded applications. It is intended primarily as an intra-system interface, allowing chip-to-chip and board-to-board communications at Gigabyte per second performance levels. It provides a rich variety of features including high data bandwidth, low-latency capability and support for high-performance I/O devices, as well as providing globally shared memory, message
passing, and software managed programming models.
The electronic version of this International Standard can be downloaded from the ISO/IEC Information Technology Task Force (ITTF) website.
|
| Class |
C990
(IEC PUBLICATIONS IEC PUBLICATIONS)
|
| Status |
IEC PUBLICATION |
| Situation |
Currently active
|
|
| Committee |
ISO/IEC JTC 1/SC 25
INTERCONNECTION OF INFORMATION TECHNOLOGY EQUIPMENT
|
| Responsible |
Eswaran Anirudh
Diamant Building
Bd. A. Reyerslaan, 80
B-1030
BRUXELLES - BRUSSEL
Belgique
E-mail: anirudh.eswaran@ceb-bec.be
|
| BEC Approval |
2004-12-15 |
| ICS-Code (International Standards Classification) |
35.200
|
| NBN Status |
New |
|
| IEC publication date |
2004-12-15 |
| IEC last modification date |
2015-11-03 |
|
