| Publication CODE |
Title |
| IEC 61691-3-3:2001 (2001-06) |
BEHAVIOURAL LANGUAGES
PART 3-3: SYNTHESIS in VHDL |
| |
| Price Excl. VAT |
Total number of pages, tables and drawings |
|
286.00 €
|
48 P. |
Description
This standard supports the synthesis and verification of hardware designs, by defining vector types for representing signed or unsigned integer values and providing standard interpretations of widely used scalar VHDL values.
Includes package bodies, as described in annex A, which are available in electronic format either on a diskette affixed to the back cover, or as a downloadable file from the IEC Web Store.
|
| Class |
C990
(IEC PUBLICATIONS IEC PUBLICATIONS)
|
| Status |
IEC PUBLICATION |
| Situation |
Withdrawn
|
|
| Committee |
TC 91
ELECTRONICS ASSEMBLY TECHNOLOGY
|
| Responsible |
De heer VAN HECKE Luk
|
| BEC Approval |
2001-06-28 |
| ICS-Code (International Standards Classification) |
35.240.50
|
|
| IEC publication date |
2001-06-28 |
| IEC last modification date |
2015-03-04 |
|
