| Publication CODE |
Title |
| HD 576 S1 |
IEC 60822 VSB - PARALLEL SUB-SYSTEM BUS OF THE IEC 60821 VMEBUS |
| |
| Price Excl. VAT |
Total number of pages, tables and drawings |
|
25.00 €
|
1 P.. |
Description
The VSB bus was designed to meet the needs of multiprocessor systems based on high-performance 32-bit microprocessors built up from board assemblies. lt includes a high-speed asynchronous data transfer bus allowing masters to direct the transfer of binary data to and from slaves according to 4 kinds of cycles: address-only, single-transfer, block-transfer and interrupt-acknowledge cycles. It also includes an arbitration bus enabling arbiter modules and/or requester modules to coordinate the use of the data-transfer bus according to two arbitration methods (series or parallel).
|
| Class |
C100
(GENERAL GENERALITIES)
|
Available files
|
DE version
|
EN version
|
FR version
|
|
| Status |
Harmonization Document |
| Situation |
Currently active
|
|
| Committee |
ISO/IEC JTC 1/SC 25
INTERCONNECTION OF INFORMATION TECHNOLOGY EQUIPMENT
|
| Responsible |
Eswaran Anirudh
Diamant Building
Bd. A. Reyerslaan, 80
B-1030
BRUXELLES - BRUSSEL
Belgique
E-mail: anirudh.eswaran@ceb-bec.be
|
| BEC Approval |
1990-06-01 |
| Registration |
96342 |
| NBN Status |
New |
|
| Date of ratification (d.o.r.) |
1990-06-01 |
| Date of availability (d.a.v.) |
1990-10-25 |
| Date of announcement (d.o.a.) |
1990-12-15 |
| Date of publication (d.o.p.) |
1991-06-15 |
| Date of withdrawal former edition (d.o.w.) |
1991-06-15 |
|
