Publication CODE |
Title |
IEC TR 62856:2013 (2013-08) |
DOCUMENTATION ON DESIGN AUTOMATION SUBJECTS - THE BIRD'S-EYE VIEW OF DESIGN LANGUAGES (BVDL) |
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Price Excl. VAT |
Total number of pages, tables and drawings |
159.00 €
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42 P. |
Description
IEC/TR 62856:2013 describes features for existing design languages, as well as for enhancing and newly developing design languages belonging to the defined design processes of System on a chip (SoC) which ranges from system level design, SoC design implementation and verification, IP block creation and analog block design down to interface data preparation for manufacturing. Thirty-three design languages have been chosen and each feature of their latest version as of March 2011 is reflected in this report:
UML, Esterel, Rosetta, SystemC, SystemC-AMS, IBIS, CITI, TouchStone, BSDL, System Verilog, VHDL, Verilog HDL, UPF, CPF, e language, PSL, FSDB, SDC, DEF, Open Access, SDF, GDS II, OASIS, STIL, WGL, Verilog-A, Verilog-AMS, SPICE, VHDL-AMS, LEF, Liberty, CDL and IP-XACT.
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Class |
C990
(IEC PUBLICATIONS IEC PUBLICATIONS)
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Status |
IEC PUBLICATION |
Situation |
Currently active
|
|
Committee |
TC 91
ELECTRONICS ASSEMBLY TECHNOLOGY
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Responsible |
De heer VAN HECKE Luk
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BEC Approval |
2013-08-07 |
ICS-Code (International Standards Classification) |
25.040.01
, 35.240.50
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NBN Status |
New |
|
IEC publication date |
2013-08-07 |
IEC stability date |
2023-12-31 |
IEC file modification date |
2013-08-07 |
IEC last modification date |
2018-11-02 |
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